April 16, 2024

Toray Engineering Co., Ltd.

Development of Packaging Technology for Ultra-Thin Semiconductor Chips
- Reduced Energy Consumption and Improved Production Efficiency -

Toray Engineering Co., Ltd. (head office: Chuo-ku, Tokyo; CEO & COO: Takashi Iwade; hereinafter “Toray Engineering”) has developed a packaging technology for ultra-thin semiconductor chips, which have a thickness of 3 μm or less.

Reducing the thickness of semiconductor chips results in reduced electrical resistance and therefore lower energy consumption, and also enables semiconductor chips to be reduced in size. Toray Engineering seeks to commercialize packaging equipment that features this new technology during fiscal 2025, in order to cater to the increasingly widespread use of high-performance semiconductors in power devices, silicon photonics, and memory.

In the semiconductor packaging process, the process of transferring chips from dicing films and other carriers is typically carried out using needles. Chips having a thickness of 100 μm or less, which are generally categorized as “thin” chips, are transferred using special transfer jigs, but this takes more than 10 times longer than the standard needle method. The “stamp transfer method,” which takes advantage of differences in adhesive strength and is frequently used for research purposes, requires even more time, and comes up against productivity issues.

To overcome these issues, Toray Engineering has developed a new Laser Peel Transfer (LPT) technology, which uses the company’s proprietary high-speed and high-accuracy scanning system to pick up and transfer ultra-thin semiconductor chips—which have a thickness of 3 µm or less—from the carrier to the substrate. The process takes place at a speed greater than that of existing flip chip bonders.

Through its TRENG brand of business solutions that aim to change the world, Toray Engineering utilizes its proprietary technologies, engineering, and know-how to operate wide-ranging businesses, from plant engineering and factory automation systems to semiconductor production and inspection equipment.

Through this new LPT technology, Toray Engineering intends to contribute to the further development of semiconductors and encourage their use in more widespread scenarios, and thereby realize its Corporate Philosophy of “contributing to society through the creation of new value with innovative ideas, technologies and products.”

The new LPT technology was developed based on results obtained from “Research and Development Project of the Enhanced Infrastructures for Post-5G Information and Communication Systems” (JPNP20017), which is subsidized by the New Energy and Industrial Technology Development Organization (NEDO).