Electron Beam
Semiconductor Wafer
Pattern Verification System

Semiconductor devices are manufactured by repeated processes of thin film deposition, circuit pattern lithography, etching and impurity atom implantation on silicon wafers. Pattern miniaturization has progressed and minimum pattern width has reached beyond 2 nm on the leading-edge semiconductor devices.

Miniaturization of semiconductor devices contributes to profit for semiconductor manufacturers, however it causes profit loss due to the decrease of the yield rate derived from defects such as pattern short, pattern open during the production process. On semiconductor device business, it is important to inspect and measure these pattern defects and pattern dimensions during the process, improve the manufacturing process and the yield.

The NGR’s geometry verification system is based on Die to Database algorithm and contributes to high sensitivity defect inspection for pattern defects and 2 dimensional mass CD measurement by using the wide FOV electron microscope.